1. Field of the Invention
The present invention relates to a semiconductor device which has multiple levels of interconnections formed using an insulating film of low dielectric constant as an interlayer insulating film and more specifically to the structure of the periphery of a bonding pad.
2. Description of the Related Art
In recent years, the dimensions of devices have been increasingly scaled down and the spacing between each interconnection has been increasingly reduced to enhance the performance of LSIs. As the spacing between each interconnection becomes less, the capacitance between interconnections increases, reducing the propagation speed of signals. Therefore, to enhance the performance of LSIs, an insulating film of low dielectric constant is used as the interlayer insulating film. Insulating films of low dielectric constant include inorganic insulating, such as SiOC, organic insulating films, and SiOF. These films, while being low in dielectric constant, are not high in mechanical strength, e.g., Young's modulus, hardness, resistance to crack. That is, the amount of stress that leads to destruction is considerably low in comparison with other insulating films, for example, SiO2, SiN.
With LSIs using multiple levels of interconnections (multilevel interconnection configuration), of, for example, ten levels of interconnections, the first to the eighth or ninth levels of interconnections are insulated by an insulating film of low dielectric constant. In general, the lower the interconnection layers, the greater the effect of the capacitance between interconnection layers on performance. Therefore, the use of insulating film of low dielectric constant is more favorable. With LSIs using an insulating film of low dielectric constant, electrode pads are formed after the formation of multiple levels of interconnections.
FIG. 18 shows an example of a semiconductor device using an insulating film of low dielectric constant as an interlayer insulating film. A semiconductor substrate 11 in which, though not shown, devices, such as transistors, have been formed is formed on top with an insulating film 12. For example, four levels of interconnections 13 are formed on the insulating film 12. These interconnection layers 13 are interconnected by vias 14 and insulated from one another by an insulating film 15 of low dielectric constant as an interlayer insulating film. A layer of interconnection 16 above the insulating film 15 is insulated by an insulating film 17 such as a silicon nitride film. An electrode pad 18 is formed on the insulating film 17 so that it is connected to the interconnection layer 16. A silicon oxide film 19 and a silicon nitride film 20 are formed in sequence on the insulating film 17 to act as a passivation film PF. A window is formed in the silicon oxide film 19 and the silicon nitride film 20 to expose the electrode pad 18.
FIG. 19 shows Young's moduli of metal materials and insulating films used for multiple levels of interconnections of LSIs. Young's modulus is one parameter that indicates mechanical strength. The Young's moduli of metal materials are all more than 100 GPa. In contrast, the Young's moduli of insulating films are all less than 100 GPa. In particular, the Young's moduli of insulating films of low dielectric constant made of materials called Low-k materials are 20 GPa or less. For this reason, insulating films made of Low-k materials are low in mechanical strength.
For a semiconductor device in which an insulating film of low dielectric constant is used as an interlayer insulating film and metal interconnections are formed below an electrode pad, a technique has been developed which prevents the insulating film from cracking at the time of wire bonding (see, for example, Japanese Patent Publication No. 3121311).
Moreover, a multilayer printed wiring board has been developed in which a member that prevents the progress of cracking is embedded in an insulating member formed around the periphery of a part-mounting conductive pad (see, for example, Japanese Unexamined Patent Publication No. 2000-349447, Japanese Patent Publication No. 3121311).
As described above, the insulating films of low dielectric constant are low in mechanical strength. For this reason, the shock resulting from bonding a wire to the electrode pad 18 will cause cracking to occur in the insulating film 15 of low dielectric constant, the silicon oxide film 19, and the silicon nitride film 20.
That is, as shown in FIG. 20, at the time of bonding a wire 100 to the electrode pad 18, if the wire is not precisely aligned with the electrode pad and consequently a portion of it comes into contact with the insulating films around the pad, cracking will occur in the insulating films 15, 17, 19 and 20 as shown in FIG. 19 due to mechanical force at wire bonding time. Moisture or oxygen infiltrating through the cracking will corrode or oxidize the metal of the interconnection layers 13 and the vias. FIG. 20 shows at 102 corrosion on the interconnection. For this reason, a semiconductor device is demanded which is adapted to preventing the occurrence of cracking in an insulating film of low dielectric constant below an electrode pad at wire bonding time, thereby allowing the degradation of interconnection layers to be suppressed/eliminated.